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mm/vmm: loongarch64: Slightly better fix than that in df3b0aa05434f49a4c28019f61e9c3818f4268f3

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Mintsuki 2025-11-23 06:01:41 +01:00
parent d0e8016ed7
commit 09b5a3e2d7
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GPG Key ID: 1F3C021BECA23821
2 changed files with 18 additions and 15 deletions
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15
common/mm/vmm.c
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@ -466,6 +466,21 @@ static uint64_t pt_to_vmm_flags_internal(pt_entry_t entry) {
}
pagemap_t new_pagemap(int paging_mode) {
(void)paging_mode;
uint32_t cpucfg_val;
asm volatile (
"cpucfg %0, %1"
: "=r"(cpucfg_val)
: "r"(1)
);
uint32_t valen = ((cpucfg_val >> 12) & 0xff) + 1;
if (valen < 48) {
panic(true, "vmm: VALEN values < 48 not currently supported");
}
(void)paging_mode;
pagemap_t pagemap;
pagemap.pgd[0] = ext_mem_alloc(PT_SIZE);

18
common/mm/vmm.h
View File

@ -3,7 +3,6 @@
#include <stdint.h>
#include <stdbool.h>
#include <lib/print.h>
#if defined (__x86_64__) || defined (__i386__)
@ -124,22 +123,11 @@ void map_page(pagemap_t pagemap, uint64_t virt_addr, uint64_t phys_addr, uint64_
#elif defined (__loongarch64)
#define paging_mode_va_bits(mode) ({ \
(void)(mode); \
uint32_t cpucfg_val; \
uint32_t cfg_num = 1; \
\
asm volatile ( \
"cpucfg %0, %1" \
: "=r"(cpucfg_val) \
: "r"(cfg_num) \
); \
\
((cpucfg_val >> 12) & 0xff) + 1; \
})
#define paging_mode_va_bits(mode) 48
static inline uint64_t paging_mode_higher_half(int paging_mode) {
return ~(((uintptr_t)1 << (paging_mode_va_bits(paging_mode) - 1)) - 1);
(void)paging_mode;
return 0xffff800000000000;
}
// We use fake flags here because these don't properly map onto the