diff options
| author | Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2025-10-23 16:58:08 +0300 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2025-11-18 17:52:54 +0100 |
| commit | 819ac6b055350c559dbb111f970a96e2c1c812ff (patch) | |
| tree | 12c3efc822461b10af7a0e8c9c1bfe87cdb024d6 | |
| parent | 78f2d64e484753bfede6a0e9eab0ef35830c34fb (diff) | |
reset: rzg2l-usbphy-ctrl: Add support for RZ/G3S SoC
The Renesas RZ/G3S SoC USB PHY HW block receives as input the USB PWRRDY
signal from the system controller. Add support for the Renesas RZ/G3S SoC.
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| -rw-r--r-- | drivers/reset/reset-rzg2l-usbphy-ctrl.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/reset/reset-rzg2l-usbphy-ctrl.c b/drivers/reset/reset-rzg2l-usbphy-ctrl.c index f7901112f38c..eea56687cd0a 100644 --- a/drivers/reset/reset-rzg2l-usbphy-ctrl.c +++ b/drivers/reset/reset-rzg2l-usbphy-ctrl.c @@ -96,6 +96,10 @@ static int rzg2l_usbphy_ctrl_status(struct reset_controller_dev *rcdev, static const struct of_device_id rzg2l_usbphy_ctrl_match_table[] = { { .compatible = "renesas,rzg2l-usbphy-ctrl" }, + { + .compatible = "renesas,r9a08g045-usbphy-ctrl", + .data = (void *)RZG2L_USBPHY_CTRL_PWRRDY + }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, rzg2l_usbphy_ctrl_match_table); |